FEATURES
· Voltage Supply
-1.8V device(K9K4GXXQ0M): 1.70V~1.95V
-3.3V device(K9XXGXXUXM): 2.7 V ~3.6 V
· Organization
- Memory Cell Array
-X8 device(K9XXG08XXM) : (512M + 16,384K)bit x 8bit
-X16 device(K9XXG16XXM) : (256M + 8,192K)bit x 16bit
- Data Register
-X8 device(K9XXG08XXM): (2K + 64)bit x8bit
-X16 device(K9XXG16XXM): (1K + 32)bit x16bit
- Cache Register
-X8 device(K9XXG08XXM) : (2K + 64)bit x8bit
-X16 device(K9XXG16XXM) : (1K + 32)bit x16bit
· Automatic Program and Erase
- Page Program
-X8 device(K9XXG08XXM) : (2K + 64)Byte
-X16 device(K9XXG16XXM) : (1K + 32)Word
- Block Erase
-X8 device(K9XXG08XXM) : (128K + 4K)Byte
-X16 device(K9XXG16XXM) : (64K + 2K)Word
· Page Read Operation
- Page Size
- X8 device(K9XXG08XXM) : 2K-Byte
- X16 device(K9XXG16XXM) : 1K-Word
- Random Read : 25ms(Max.)
- Serial Access : 50ns(Min.)
30ns(Min., K9XXG08UXM only)
· Fast Write Cycle Time
- Program time : 300ms(Typ.)
- Block Erase Time : 2ms(Typ.)
· Command/Address/Data Multiplexed I/O Port
· Hardware Data Protection
- Program/Erase Lockout During Power Transitions
· Reliable CMOS Floating-Gate Technology
- Endurance : 100K Program/Erase Cycles
- Data Retention : 10 Years
· Command Register Operation
· Cache Program Operation for High Performance Program
· Power-On Auto-Read Operation
· Intelligent Copy-Back Operation
· Unique ID for Copyright Protection
· Package :
- K9XXGXXXXM-YCB0/YIB0
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
- K9W8G08U1M-YCB0/YIB0 : Two K9K4G08U0M stacked.
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
- K9XXGXXXXM-PCB0/PIB0
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
- K9W8G08U1M-PCB0/PIB0 : Two K9K4G08U0M stacked.
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
Offered in 512Mx8bit or 256Mx16bit, the K9XXGXXXXM is 4G bit with spare 128M bit capacity. Its NAND cell provides the most
cost-effective solution for the solid state mass storage market. A program operation can be performed in typical 300ms on the 2112-
byte(X8 device) or 1056-word(X16 device) page and an erase operation can be performed in typical 2ms on a 128K-byte(X8 device)
or 64K-word(X16 device) block. Data in the data page can be read out at 50ns cycle time per byte(30ns, only X8 3.3v device) or
word(X16 device). The I/O pins serve as the ports for address and data input/output as well as command input. The on-chip write
controller automates all program and erase functions including pulse repetition, where required, and internal verification and margin
ng of data. Even the write-intensive systems can take advantage of the K9XXGXXXXM¢s extended reliability of 100K program/erase
cycles by providing ECC(Error Correcting Code) with real time mapping-out algorithm. The K9XXGXXXXM is an optimum solution for
arge nonvolatile storage applications such as solid state file storage and other portable applications requiring non-volatility. An ultra
high density solution having two 4Gb stacked with two chip selects is also available in standard TSOPI package. |