STR到底是单周期还是多周期的？？？

la45088d1

根据ARM的技术手册，ARM® Cortex®-M3 Processor Revision: r2p1 Technical Reference Manual；这是文件名包含版本，这里提到几个机制的原文如下：
STR Rx,[Ry,#imm] is always one cycle. This is because the address generation is performed in the
initial cycle, and the data store is performed at the same time as the next instruction is executing. If
the store is to the write buffer, and the write buffer is full or not enabled, the next instruction is
delayed until the store can complete. If the store is not to the write buffer, for example to the Code
segment, and that transaction stalls, the impact on timing is only felt if another load or store operation
is executed before completion.
所以可以知道，当写缓存有的情况下而且没满，写入操作理论上就应该是单周期指令，结果使用Keil进行仿真，内核启动后第一条写指令就消耗了2个周期？？？
执行前：


执行后：

What the FUCK it is？
说好的单周期变成2个周期了？到底是那里的问题呢？

la45088d1

补充说明：上一条指令被翻译成：MOV R1,#0x20000000的机器码，不是LDR R1,[R15,#Offset]这种文字池加载立即数形式，所以不是前一条指令和后面STR发生Write after read冲突引起的流水线阻塞引起的延迟。